addressable.wiki

Amicc SC5050A-B01 (backup input)

1-wire RGB · Amicc · amicc

Channels
RGB
Bits / channel
8
Supply
3.7–5.3 V
PWM
—
Backup data
yes
Packages
1

Amicc’s six-pin 5050 pixel with a backup data input. The data format is 24 bits, high bit first, in G, R, B order (page 10). The “DIN” the sheet mentions is a real data pin, not just a reference to a driver.

Datasheets disagree with themselves: the feature list and operating-range table give a 3.7-5.3 V supply but the table heading says VDD = 3.0-5.5 V; the absolute-maximum drive current is 25 mA while the sink current is 12 mA typical. The default current is 12 mA per colour (chip optical table, page 6).

Refresh & flicker

The feature list says display refresh up to 20 kHz (page 3); no separate PWM frequency is printed. Data rate up to 800 kbps. Supply: the feature list and operating-range table give VDD 3.7-5.3 V (5 V typical) while the operating- range heading says 3.0-5.5 V and the pin table says 5 V +/-10 percent. LED drive 12 mA maximum, sink current 11.4 / 12 / 12.6 mA, LED pin voltage up to 6.5 V, sleep current 5 uA, propagation delay 300 ns, input thresholds 0.7 / 0.3 x VDD (page 8).

Timing

Sources disagree. This is normal and worth understanding: FastLED's numbers are tuned to drive real parts reliably, including clones, while the datasheet gives the manufacturer's nominal figures. Both are recorded here rather than picking one and hiding the conflict.

Amicc SC5050A-B01 (backup input) bit timingAmicc SC5050A-B01 (backup input) bit timing: a zero bit is 300 nanoseconds high then 790 low; a one bit is 790 high then 300 low; tolerance plus or minus 100 nanoseconds; reset 280 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1090 nsbit 1 period 1090 nsT0H 300 ±100 nsT1H 790 ±100 nsT0L 790 ±100 nsT1L 300 ±100 ns"0" bit"1" bit0200400600800100012001400160018002000time, ns± tolerance on each falling edge2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~1090 ns ≈ 26.2 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 280 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.BIN (backup): tied to the previous pixel's DIN
T0H 300 / T0L 790 · T1H 790 / T1L 300 ns · ±100 ns · period 1090 ns · reset 280 µs source: datasheet
SourceT0HT0LT1HT1LPeriodRateReset±
datasheet ↗ 300 ns 790 ns 790 ns 300 ns 1090 ns 917 kHz 280 µs 100 ns
Printed typicals: T0H 0.3 us and T1L 0.3 us, each +/-0.10 us. T1H and T0L are printed only as a window “580 ns to 1 us”; 790 ns is its midpoint, not a stated figure. Reset at least 280 us. The sum of the highs and lows is not stated.
datasheet ↗ 300 ns 2600 ns 900 ns 2000 ns 2900 ns 345 kHz 280 µs 100 ns
Typicals as printed: T0H 0.3 us (+/-0.10), T1H 0.9 us, T0L 2.6 us, T1L 2.0 us (+/-0.10), reset at least 280 us. The sheet does not say how the chip is put into this mode or what it does differently; the heading translates as “breakpoint-resume working mode” and the feature list says “breakpoint resume: one damaged IC or LED does not affect the following data”.

Clones & compatibility

“Compatible” is never stated bare here — each relationship carries how strong the claim is, and what bites if you assume too much.

  • electrically similar WS2813

    Inferred from the sheet's own features and numbers; Amicc never names WorldSemi or WS2813. It has a backup signal input (BIN, "备份信号输入脚") and a breakpoint-resume feature, the pads sit in the same positions as the catalogue's WS2813 5050 (DIN, GND, BIN down the left column; DO, VDD, NC down the right, NC at the cut corner), and its normal-mode figures (T0H 300 ns, reset 280 us, T1H and T0L in a 580 ns to 1 us window) match WorldSemi's newer WS2813 table. T1L, however, is 300 +/-100 ns where the WorldSemi table has 580 ns to 1 us, and colour order is GRB. Supply is 3.7-5.3 V. Not tested. source ↗

Library support

Not checked against library source.

Parts using this protocol

Dating evidence

Evidence, not a release date. A library commit proves the part existed by that date and says nothing about how long before.

  • 2021-03-06 datasheet revision Amicc A-SC5050ARGBC-B01-03-1T datasheet, 'Release Date: 06.Mar.2021, Issue No: V1' (ADE-SA2-058) ↗ day