Xinglight 2812B (5 V, 12 mA, 0.295/0.595 us table)

No datasheet names the driver IC or its maker: the sheets are Xinglight letterhead documents titled with the SKU only, so this protocol is defined by the figures the sheets print (supply, per-channel current, timing table, pin set), not by a known die.

Datasheets disagree: the XL-5050RGBC-2812B sheet (C2843785) is titled WS2812b throughout (cover, “WS2812b Functional characteristics”), but its timing table (p7: 0.295/0.595/0.595/0.295 us, cycle min 0.89 us, reset 80 us, 12 mA) is the symmetric SK6812-style set, not WS2812B’s. The prose note under the same table gives different windows: “high level between 200 ns and 410 ns is a 0 code, between 640 ns and 1000 ns a 1 code” (table: 0.20-0.35 and 0.55-1.2 us), and note b says the reset low time is “a minimum of 100 us” and gaps over 35 us may be taken as RESET (table: reset 80 us min). The same sheet says “port scan frequency 1.5 KHz” (p2) and FPWM 4 kHz (p5), and “VDD is 100 % functional above 4.5-5.5 V” (p2) against a 3.5-5.5 V supply limit (p4).

Datasheets disagree between siblings: the -S sheet (C22461793) rounds the table to 0.3/0.6 us with windows up to 0.4 us and ESD 2000 V; the -HM sheets print the base numbers with cycle min 0.9 us and ESD 3000 V. They are recorded as variants (same silicon is the simplest reading) but nothing in the sheets proves it.

Per-channel drive is 12 mA (feature list “preset 12 mA / channel”, electrical table Lol1 12 mA, absolute-max table also 12 mA). Colour order GRB, high bit first, 24 bits.