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2.7 × 2.4 mm 4 pins top-emitting

WS2812E-2427

2427 · smd · WS2812E · WorldSemi

1-wire RGB 3.7–5.3 V active

Also sold as WS2812E 2427

At a glance

Colour
RGB8 bits per channel
Data
1-wiretimed pulses on one line
Supply
3.7–5.3 Vno backup data line
Size
2.7 × 2.4 × 1.1 mm4 pins · top
Max current
37.5 mA12.5 mA per channel
PWM
2 kHzreset 280 µs
Library support
FastLED WLED Adafruit

Same drawing as WS2812C-2427 (chamfer at the pin 4 corner). The sheet’s timing table blanks out T0L and T1L, so those limits are unknown for this part.

Variants

One row per orderable SKU. Everything not listed is inherited from the part above.

Order codeFaceLensWhite PinsSiliconStatusFirst seenDatasheet
WS2812E-2427 — — — 4 — active unknown PDF
Stock 1,300 when checked.

Pinout

WS2812E-2427
WS2812E-2427 2427 package, top and side viewPin 1 is ringed. pin 1 DIN (data in), pin 2 VDD (power), pin 3 DOUT (data out), pin 4 GND (ground).11 DINdata in22 VDDpower33 DOUTdata out44 GNDground2.7 mm2.4 mmtop view1.1 mmside view
  • Data
  • Power
  • Ground
  • Pin 1
  • Cut corner

Outline and pin positions checked against the manufacturer datasheet (WS2812E-2427 sheet p2). The cut corner is at pin 4 (top-right). What this means.

  1. 1 DIN data in
  2. 2 VDD power
  3. 3 DOUT data out
  4. 4 GND ground

Protocol — WS2812E

Timings shown from datasheet.

WS2812E bit timingWS2812E bit timing: a zero bit is 300 nanoseconds high then 790 low; a one bit is 790 high then 790 low; reset 280 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1090 nsbit 1 period 1580 nsT0H 300 nsT1H 790 nsT0L 790 nsT1L 790 ns"0" bit"1" bit02505007501000125015001750200022502500time, nsDatasheet lists unequal bit periods (1090 vs 1580 ns); each bit is drawn with its own.2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~1580 ns ≈ 37.9 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 280 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 300 / T0L 790 · T1H 790 / T1L 790 ns · reset 280 µs source: datasheet

Compatibility

  • protocol compatible WS2812B-V5

    Identical datasheet timing windows, pin count (4) and supply range. Independent measurement has not been done; E and B differ in IC drive current (12-12.5 mA) and packages (the E exists in 1313, 2020, 2427, 3535-class MINI and 4020). source ↗

Dating evidence

Nobody announces these parts, so this records what we can actually cite rather than a release date. Library support proves only that the part existed by that date.

  • 2021-03-17 datasheet revision WorldSemi WS2812E-1313 datasheet (LCSC C5446700) Modify Record: 'V1.0 N New 20210317' ↗ day

Where to buy

Stub data — a few rows so purchase links can grow later. Prices are not tracked.

Similar parts

Same protocol or package first, then the same data scheme and colour channels.

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