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3.5 × 3.5 mm 4 pins top-emitting

XL-3535RGBC-2812B-12V

3535 · smd · Xinglight 2812B 12 V 3535 (10.8-13.2 V, 9 mA) · Xinglight

1-wire RGB 10.8–13.2 V active

Also sold as XL-3535RGBC-WS2812B-12V

At a glance

Colour
RGB8 bits per channel
Data
1-wiretimed pulses on one line
Supply
10.8–13.2 Vno backup data line
Size
3.5 × 3.5 × 1.9 mm4 pins · top
Max current
27 mA9 mA per channel
PWM
4 kHzreset 80 µs
Library support
FastLED WLED Adafruit

Variants

One row per orderable SKU. Everything not listed is inherited from the part above.

Order codeFaceLensWhite PinsSiliconStatusFirst seenDatasheet
XL-3535RGBC-2812B-12V — — — 4 — active 2025-12-30 PDF
Do not connect to a 5 V rail. LCSC stock 1,295 on 2026-10-15.

Pinout

XL-3535RGBC-2812B-12V
XL-3535RGBC-2812B-12V 3535 package, top and side viewPin 1 is ringed. pin 1 VDD (power), pin 2 DO (data out), pin 3 GND (ground), pin 4 DI (data in).11 VDDpower22 DOdata out33 GNDground44 DIdata in3.7 mm overall3.5 mmtop view2 mmside view
  • Power
  • Data
  • Ground
  • Pin 1
  • Cut corner

Outline and pin positions checked against the manufacturer datasheet (C51900943 XL-3535RGBC-WS2812B-12V p10 (outline, solder pattern, labelled top view)). Counter-clockwise from the top-left (VDD, DO, GND, DI); cut corner at pin 3. What this means.

  1. 1 VDD power
  2. 2 DO data out
  3. 3 GND ground
  4. 4 DI data in

Protocol — Xinglight 2812B 12 V 3535 (10.8-13.2 V, 9 mA)

Timings shown from datasheet.

Xinglight 2812B 12 V 3535 (10.8-13.2 V, 9 mA) bit timingXinglight 2812B 12 V 3535 (10.8-13.2 V, 9 mA) bit timing: a zero bit is 250 nanoseconds high then 1000 low; a one bit is 850 high then 400 low; reset 80 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1250 nsbit 1 period 1250 nsT0H 250 nsT1H 850 nsT0L 1000 nsT1L 400 ns"0" bit"1" bit02505007501000125015001750200022502500time, ns2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~1250 ns ≈ 30 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 80 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 250 / T0L 1000 · T1H 850 / T1L 400 ns · period 1250 ns · reset 80 µs source: datasheet

Dating evidence

Nobody announces these parts, so this records what we can actually cite rather than a release date. Library support proves only that the part existed by that date.

  • 2025-12-30 estimate PDF CreationDate metadata of Xinglight sheet XL-3535RGBC-2812B-12V (LCSC C51900943); the sheet has no revision table, so this is only the date the PDF file was produced ↗ day

Where to buy

Stub data — a few rows so purchase links can grow later. Prices are not tracked.

Similar parts

Same protocol or package first, then the same data scheme and colour channels.

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