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1.0 × 1.0 mm 4 pins top-emitting

T62

1010 · smd · TCWIN T62 · TCWIN

1-wire RGB 3.5–5.5 V active

At a glance

Colour
RGB8 bits per channel
Data
1-wiretimed pulses on one line
Supply
3.5–5.5 Vno backup data line
Size
1.0 × 1.0 × 0.7 mm4 pins · top
Max current
15 mA5 mA per channel
PWM
4 kHzreset 80 µs
Library support
FastLED WLED Adafruit

TCWIN T62: a 1.0 x 1.0 x 0.68 mm built-in-IC LED (the sheet says it looks like a 1010 LED), 5 mA per channel, version A1 dated 2025-01-04 - the smallest addressable LED in this TCWIN set. Pins (p5): 1 VDD, 2 DIN, 3 GND, 4 DO, numbered clockwise from the bottom-left in the top view. The electrical and timing tables are word for word the TX1812 5 mA tables (T0H 245/295/345, T0L 545/595/645 ns, reset 80 us, 3.5-5.5 V), but the sheet gives no IC name, so it is filed under its own protocol with a compatibility edge to tx1812.

Pin 1 is VDD and the numbering runs clockwise from the bottom-left in the sheet’s top view, unlike the 2017/2528/1515 TX1812 sheets, which run counter-clockwise.

Variants

One row per orderable SKU. Everything not listed is inherited from the part above.

Order codeFaceLensWhite PinsSiliconStatusFirst seenDatasheet
T62 — — — 4 — active 2025-01-04 A1
LCSC stock 4,490 on 2026-10-15.

Pinout

T62
T62 1010 package, top and side viewPin 1 is ringed. pin 1 VDD (power), pin 2 DIN (data in), pin 3 GND (ground), pin 4 DO (data out).11 VDDpower22 DINdata in33 GNDground44 DOdata out1.0 mm1.0 mmtop view0.7 mmside view
  • Power
  • Data
  • Ground
  • Pin 1
  • Polarity bar

Outline and pin positions checked against the manufacturer datasheet (C48982515 T62 rev A1 p4). Numbered clockwise from bottom-left in the sheet top view (1 VDD, 2 DIN, 3 GND, 4 DO). Pads 0.35 mm with 0.28 mm gaps; the green bar on the top edge is not explained. What this means.

  1. 1 VDD power
  2. 2 DIN data in
  3. 3 GND ground
  4. 4 DO data out

Protocol — TCWIN T62

Timings shown from datasheet.

TCWIN T62 bit timingTCWIN T62 bit timing: a zero bit is 295 nanoseconds high then 595 low; a one bit is 595 high then 295 low; tolerance plus or minus 50 nanoseconds; reset 80 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 890 nsbit 1 period 890 nsT0H 295 ±50 nsT1H 595 ±50 nsT0L 595 ±50 nsT1L 295 ±50 ns"0" bit"1" bit02004006008001000120014001600time, ns± tolerance on each falling edge2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~890 ns ≈ 21.4 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 80 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 295 / T0L 595 · T1H 595 / T1L 295 ns · ±50 ns · period 890 ns · reset 80 µs source: datasheet

Compatibility

  • protocol compatible TX1812

    The T62 electrical and timing tables are word for word the TX1812 5 mA tables (windows, 3.5-5.5 V, 4 kV ESD, 5 mA, GRB). The T62 sheet never mentions TX1812; this edge is based on the identical numbers only. source ↗

Dating evidence

Nobody announces these parts, so this records what we can actually cite rather than a release date. Library support proves only that the part existed by that date.

  • 2025-01-04 datasheet revision TCWIN T62 specification cover: date 20250104, version A1 ↗ day

Where to buy

Stub data — a few rows so purchase links can grow later. Prices are not tracked.

Similar parts

Same protocol or package first, then the same data scheme and colour channels.

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