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ABOC BB single-wire IC (RGB order)

1-wire RGB · American Bright Optoelectronics · aboc

Channels
RGB
Bits / channel
8
Supply
4.5–5.5 V
PWM
—
Backup data
no
Packages
2

ABOC / Bright LED’s mid-2010s single-wire cell for the 5050 and 3528 packages. The sheets give no chip name (‘IC’s function diagram’ is an empty block on the PDF). Datasheet detail: the Bright LED letterhead names ‘BRIGHT LED ELECTRONICS CORP.’ on every BB- sheet; LCSC files these parts under American Bright Optoelectronics (ABOC). The BrtLed BL-HRGB32K-3-TRB is a different IC: same package drawing, but a 0.3 / 0.9 / 0.6 / 0.6 us timing table, 80 us reset and GRB order - see the brtled-bl-hrgb32k-5050 part.

Refresh & flicker

800 kHz data rate, 256 grey levels, constant-current 12 mA per channel (11-13 mA), static current 0.5 mA at 4.5 V, DIN thresholds 0.7 / 0.3 VDD (0.65 VDD on the BB-HRGB32M-TRB-C sheet), DIN to DOUT delay 80 ns. The sheet prints no PWM frequency. Data order on the wire is R, G, B, MSB first, stated in words and drawn that way (R7 … R0, G7 … G0, B7 … B0): note this is NOT the G, R, B order of the WS2812 and SK6812 families.

Timing

ABOC BB single-wire IC (RGB order) bit timingABOC BB single-wire IC (RGB order) bit timing: a zero bit is 300 nanoseconds high then 900 low; a one bit is 900 high then 300 low; reset 200 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1200 nsbit 1 period 1200 nsT0H 300 nsT1H 900 nsT0L 900 nsT1L 300 ns"0" bit"1" bit020040060080010001200140016001800200022002400time, ns2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~1200 ns ≈ 28.8 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 200 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 300 / T0L 900 · T1H 900 / T1L 300 ns · period 1200 ns · reset 200 µs source: datasheet
SourceT0HT0LT1HT1LPeriodRateReset±
datasheet ↗ 300 ns 900 ns 900 ns 300 ns 1200 ns 833 kHz 200 µs —
Min / typ / max table: T element cycle min 1200 ns; T0H 200 / 300 / 400 ns; T0L 800 / 900 ns (no maximum); T1H 650 / 900 / 1000 ns; T1L 200 / 300 ns (no maximum); reset >=200 us. T0L and T1L are minimums with a typical beside them. ‘When writing a program, the minimum code cycle requirement is 1200 ns.’

Clones & compatibility

“Compatible” is never stated bare here — each relationship carries how strong the claim is, and what bites if you assume too much.

  • protocol compatible SK6805

    Timing numbers only: T0H 300 / T0L 900 / T1H 900 / T1L 300 ns with windows 200-400 / 800- / 650-1000 / 200- and a 200 us reset are the numbers the sk6805 protocol records from the OPSCO EC-series sheets. The order differs (RGB here, GRB for SK6805), the drive is 12 mA (5 mA for SK6805) and the ABOC sheets never mention SK6805 or any other maker's IC. source ↗

  • protocol compatible of this Everlight 3-channel 8-bit PWM single-wire IC

    Same 300 / 900 / 900 / 300 ns split and the same R, G, B (not G, R, B) data order as the ABOC BB sheets; the tolerance (+/-80 ns here, 200-400 / 650-1000 ns windows there) and the reset (50 us here, 200 us there) differ. Neither maker names the other's IC.

Library support

Not checked against FastLED, Adafruit or WLED source.

Parts using this protocol

Dating evidence

Evidence, not a release date. A library commit proves the part existed by that date and says nothing about how long before.

  • 2019-11 estimate PDF metadata CreationDate of the LCSC copy of the BB-HRGB32K-TRB sheet (the sheet prints a version number but no date) ↗ month