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ABOC IC-NL3C-BA two-wire IC

SPI RGB · American Bright Optoelectronics · aboc

Channels
RGB
Bits / channel
8
Supply
4.5–5.5 V
PWM
—
Backup data
no
Packages
1

The 2020-size ‘BGR’ two-wire IC. A 5 V strip design where several LEDs can be wired in series to reach 12 / 24 / 48 V rails is described on the application page. The IC is called IC-NL3C-BA on the sheet; no manufacturer of the IC is named.

Refresh & flicker

The sheet names the IC IC-NL3C-BA: 256-level colour set and 32-level brightness, a built-in oscillator resistor (+/-1.0 percent) ‘to achieve simultaneous flashing’, over-temperature protection, LED supply 3-6 V (VLED), output limited to 20 mA. ‘The sequence of LEDs are B/G/R’. The page-4 figure shows a 032 start frame, per LED 32 bits ‘111’ + 5-bit global brightness + blue + green + red, and a 132 end frame.

Frame format

ABOC IC-NL3C-BA two-wire IC SPI frameABOC IC-NL3C-BA two-wire IC clocked frame: start frame, one 32-bit LED frame per pixel with brightness and colour bytes, and an end frame, plus data and clock waveforms1 · Frame stream (data clocked on CLK)Start frame32 × 0LED 132 bitsLED 232 bits…LED N32 bitsEnd frameclock ≥ N/2 edgeseach LED forwards what it does not keep on DO / CO2 · One LED frame: 32 bits, MSB first111brightch 1 8ch 2 8ch 3 83 marker bits (111), 5-bit global brightness 0–31, then 8-bit channels3 · DATA and CLK, first 8 bits of an LED frameDATACLK11110010111 markerbrightness bits 4..0data changes while CLK is low,LED samples on the rising edgeno fixed bit period: clock rateis set by the host
Frame layout: APA102-family 32-bit LED frames convention, see the protocol notes for end-frame differences
SourceT0HT0LT1HT1LPeriodRateReset±
datasheet ↗ — — — — — — — —
Clock and data: no bit timing. Clock high and low width >30 ns, data set-up >10 ns, data hold >5 ns. Rate of data signal ‘FCLK <10 MHz’ in the electrical table and 15 MHz in the absolute maximum table, while the features text recommends 11 MHz and ‘not to exceed 12 MHz’. Output transfer time <15 ns, propagation delay <15 ns, minimum output PWM opening width 200 ns at 20 mA.

Clones & compatibility

“Compatible” is never stated bare here — each relationship carries how strong the claim is, and what bites if you assume too much.

  • protocol compatible APA102

    Same CIN/DIN clock-and-data arrangement and the same 32 zero-bit start frame, 3-bit '111' marker + 5-bit brightness and B, G, R order as APA102 on the page-4 description, but the sheet never mentions APA102 and gives no end-frame behaviour; recorded as a structural match. source ↗

Library support

Not checked against FastLED, Adafruit or WLED source.

Parts using this protocol

Dating evidence

Evidence, not a release date. A library commit proves the part existed by that date and says nothing about how long before.

  • 2019 estimate Footer of every BB-2020BGR-TRB page: 'Copyright 2019 American Bright Optoelectronics Corp.' ↗ year