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Amicc SC5050A-B02

1-wire RGB · Amicc · amicc

Channels
RGB
Bits / channel
8
Supply
3–7.5 V
PWM
—
Backup data
no
Packages
1

Amicc’s four-pin 5050 pixel, the second revision of the A-SC5050ARGBC family (the B01 sheet is the six-pin backup-input version, a different IC by its sheet). The IC is not named.

Refresh & flicker

The parameter-limitation table lists PWM as “3-5 kHz” (a range, so the field is empty); the feature list says display refresh up to 20 kHz. Data rate 800 typical / 1100 kHz maximum, DIN to DOUT delay at most 200 ns, rise and fall at most 400 ns; sleep current 0.6 / 0.8 / 1 mA; per-colour sink current 12 mA minimum / 15 mA maximum (page 6). Feature list says VDD 3-7.5 V.

Timing

Amicc SC5050A-B02 bit timingAmicc SC5050A-B02 bit timing: a zero bit is 295 nanoseconds high then 595 low; a one bit is 595 high then 295 low; tolerance plus or minus 50 nanoseconds; reset 80 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 890 nsbit 1 period 890 nsT0H 295 ±50 nsT1H 595 ±50 nsT0L 595 ±50 nsT1L 295 ±50 ns"0" bit"1" bit02004006008001000120014001600time, ns± tolerance on each falling edge2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~890 ns ≈ 21.4 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 80 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 295 / T0L 595 · T1H 595 / T1L 295 ns · ±50 ns · period 890 ns · reset 80 µs source: datasheet
SourceT0HT0LT1HT1LPeriodRateReset±
datasheet ↗ 295 ns 595 ns 595 ns 295 ns 890 ns 1124 kHz 80 µs 50 ns
A single “Typ.” column with +/-0.05 us tolerance: T0H 0.295, T1H 0.595, T0L 0.595, T1L 0.295 us, reset at least 80 us. 24 bits, high bytes first, in G, R, B order. The same numbers appear in the Meihua MHP5050 sheet.

Clones & compatibility

“Compatible” is never stated bare here — each relationship carries how strong the claim is, and what bites if you assume too much.

Library support

Not checked against library source.

Parts using this protocol

Dating evidence

Evidence, not a release date. A library commit proves the part existed by that date and says nothing about how long before.

  • 2023-02-01 datasheet revision Amicc A-SC5050ARGBC-B02-03-1T datasheet, 'Release Date: 01.Feb.2023, Issue No: v2' (ADE-5050A-002) ↗ day