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Lite-On embedded single-wire IC (LTST series)

1-wire RGB · Lite-On · liteon

Channels
RGB
Bits / channel
8
Supply
4.2–5.5 V
PWM
—
Backup data
no
Packages
2

Datasheets disagree between Lite-On’s own sheets: the reset is >50 us on the E563 and G563 tables but the E563’s ‘Data Communication’ figure labels the gap ‘Reset time (>250us)’, and the E133 sheet calls it ‘Latch time >250us’. Tolerance is +/-80 ns (E563), +/-150 ns (G563, E133) with three different ‘TH+TL’ statements.

Refresh & flicker

Lite-On’s wording: ‘RGB and driver chip are integrated in a package, to form a complete control of pixel point with constant current’, ‘one pixel contains R, G and B that each can achieve 256 level brightness grayscale’, ‘internal clock frequency is operated at 800 kHz’, ‘serial data transmission by only single wire’. Output current 5 mA per channel (E133: ‘IC output current IF 5 mA, to R/G/B separately’). Data order R, G, B, MSB first (the E133 and E563 figures). The G563 HM4 sheet’s supply limit is 3.8-5.5 V, the E563 and E133 sheets 4.2-5.5 V.

Timing

Sources disagree. This is normal and worth understanding: FastLED's numbers are tuned to drive real parts reliably, including clones, while the datasheet gives the manufacturer's nominal figures. Both are recorded here rather than picking one and hiding the conflict.

Lite-On embedded single-wire IC (LTST series) bit timingLite-On embedded single-wire IC (LTST series) bit timing: a zero bit is 300 nanoseconds high then 900 low; a one bit is 900 high then 300 low; tolerance plus or minus 80 nanoseconds; reset 50 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1200 nsbit 1 period 1200 nsT0H 300 ±80 nsT1H 900 ±80 nsT0L 900 ±80 nsT1L 300 ±80 ns"0" bit"1" bit020040060080010001200140016001800200022002400time, ns± tolerance on each falling edge2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~1200 ns ≈ 28.8 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 50 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 300 / T0L 900 · T1H 900 / T1L 300 ns · ±80 ns · period 1200 ns · reset 50 µs source: datasheet
SourceT0HT0LT1HT1LPeriodRateReset±
datasheet ↗ 300 ns 900 ns 900 ns 300 ns 1200 ns 833 kHz 50 µs 80 ns
T0H 300 / T0L 900 / T1H 900 / T1L 300 ns, each +/-80 ns, ‘TH+TL=1.2 us +/-160 ns’, RES >50 us.
datasheet ↗ 300 ns 900 ns 900 ns 300 ns 1200 ns 833 kHz 50 µs 150 ns
Same typicals with +/-150 ns, ‘TH+TL=1.2 us +/-600 ns’, RES >50 us.
datasheet ↗ 300 ns 900 ns 900 ns 300 ns 1200 ns 833 kHz 250 µs 150 ns
Same typicals with +/-150 ns, ‘TH+TL=1.2 us +/-300 ns’; the row is called LAT (latch time) and reads >250 us.

Clones & compatibility

“Compatible” is never stated bare here — each relationship carries how strong the claim is, and what bites if you assume too much.

Library support

Not checked against FastLED, Adafruit or WLED source.

Parts using this protocol

Dating evidence

Evidence, not a release date. A library commit proves the part existed by that date and says nothing about how long before.

  • 2017-03-29 datasheet revision Lite-On LTST-G563EGBW-HM4 data sheet: 'Effective Date: 03/29/2017, Revision: A' ↗ day