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5.4 × 5.0 mm 4 pins top-emitting

LTST-E563CEGBW

5050 · smd · Lite-On embedded single-wire IC (LTST series) · Lite-On

1-wire RGB 4.2–5.5 V active

Also sold as LTST-G563EGBW-HM4

At a glance

Colour
RGB8 bits per channel
Data
1-wiretimed pulses on one line
Supply
4.2–5.5 Vno backup data line
Size
5.4 × 5.0 × 1.6 mm4 pins · top
Max current
15 mA5 mA per channel
PWM
—reset 50 µs
Library support
FastLED WLED Adafruit

5.0 x 5.4 mm four-pin LED with embedded IC; the E563 has a white diffused lens and the G563-HM4 a water-clear lens. 12 mm tape, MSL 3 (HM4) or 4 (E563). The ‘HM4’ suffix is the four-pin build: LCSC also sells a plain six- pin LTST-G563EGBW (C913089) that has no IC and is not modelled here. Total DC current IF is 5 mA on the HM4 sheet and 19 mA on the E563 sheet. LCSC stock: E563 0, G563-HM4 0 on 2026-10-15.

Variants

One row per orderable SKU. Everything not listed is inherited from the part above.

Order codeFaceLensWhite PinsSiliconStatusFirst seenDatasheet
LTST-E563CEGBW — diffused — 4 — active 2017-03-29 FA ↗
LCSC C913110, stock 0.
LTST-G563EGBW-HM4 — clear — 4 — active 2017-03-29 FA ↗
LCSC C479612, stock 0. Water-clear lens, 12 mm tape.

Pinout

LTST-E563CEGBWLTST-G563EGBW-HM4
LTST-E563CEGBW 5050 package, top and side viewPin 1 is ringed. pin 1 VSS (ground), pin 2 DIN (data in), pin 3 DOUT (data out), pin 4 VDD (power).11 VSSground22 DINdata in33 DOUTdata out44 VDDpower5.0 mm5.0 mmtop view1.6 mmside view
  • Ground
  • Data
  • Power
  • Pin 1
  • Cut corner

Outline and pin positions checked against the manufacturer datasheet (C479612 LTST-G563EGBW-HM4 p1; C913110 LTST-E563CEGBW p1). The two pads on the top edge and two on the bottom edge are drawn (0.9 x 0.9 mm, 3.2 mm between pad centres, 5.4 mm overall including the pads). The drawing marks only a 'CATHODE' corner (top-right on the HM4 sheet) and does NOT number the pads, so the pin positions are an inference: pin 1 (VSS, ground) at the cathode corner, then the repository's counter- clockwise order. The positions of pins 2 to 4 are not confirmed by the sheet. What this means.

  1. 1 VSS ground
  2. 2 DIN data in
  3. 3 DOUT data out
  4. 4 VDD power

Protocol — Lite-On embedded single-wire IC (LTST series)

Timings shown from datasheet. Other sources disagree; see the protocol page.

Lite-On embedded single-wire IC (LTST series) bit timingLite-On embedded single-wire IC (LTST series) bit timing: a zero bit is 300 nanoseconds high then 900 low; a one bit is 900 high then 300 low; tolerance plus or minus 80 nanoseconds; reset 50 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1200 nsbit 1 period 1200 nsT0H 300 ±80 nsT1H 900 ±80 nsT0L 900 ±80 nsT1L 300 ±80 ns"0" bit"1" bit020040060080010001200140016001800200022002400time, ns± tolerance on each falling edge2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~1200 ns ≈ 28.8 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 50 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 300 / T0L 900 · T1H 900 / T1L 300 ns · ±80 ns · period 1200 ns · reset 50 µs source: datasheet

Compatibility

Dating evidence

Nobody announces these parts, so this records what we can actually cite rather than a release date. Library support proves only that the part existed by that date.

  • 2017-03-29 datasheet revision Lite-On LTST-G563EGBW-HM4 data sheet: 'Effective Date: 03/29/2017, Revision: A' ↗ day
  • 2023-05-18 datasheet revision Lite-On LTST-E563CEGBW sheet, spec DS35-2018-0038, effective date 05/18/2023 rev F ↗ day

Where to buy

Stub data — a few rows so purchase links can grow later. Prices are not tracked.

Similar parts

Same protocol or package first, then the same data scheme and colour channels.

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