addressable.wiki

Nationstar FC-RGBC3228 IC (unnamed)

1-wire RGB · Nationstar · nationstar

Channels
RGB
Bits / channel
8
Supply
3.5–5.5 V
PWM
4.5 kHz
Backup data
no
Packages
1

The driver in Nationstar’s FC-RGBC3228-A1 (listed by LCSC among plain RGB LEDs; the sheet is the generic “TOP Light Emitting Diode” form but the pin table has DI and DO and the text describes single-wire return-to-zero coding). No IC is named.

Refresh & flicker

PWM 4.5 kHz at IOUT 11.5 mA with 200 ohm to VDD, quiescent 0.45 mA at 5 V, DIN thresholds 3.1 V high / 1.5 V low, DOUT +/-14 mA, DIN to DOUT delay 80 ns, output current rise/fall 500 ns (page 5). Output current is quoted as 11.5 mA; the photometric table is at IF = 12 mA. Absolute maximum 3.5-7.5 V supply and 10 V on the output pins.

Timing

Nationstar FC-RGBC3228 IC (unnamed) bit timingNationstar FC-RGBC3228 IC (unnamed) bit timing: a zero bit is 300 nanoseconds high then 900 low; a one bit is 900 high then 300 low; tolerance plus or minus 50 nanoseconds; reset 200 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1200 nsbit 1 period 1200 nsT0H 300 ±50 nsT1H 900 ±50 nsT0L 900 ±50 nsT1L 300 ±50 ns"0" bit"1" bit020040060080010001200140016001800200022002400time, ns± tolerance on each falling edge2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~1200 ns ≈ 28.8 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 200 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 300 / T0L 900 · T1H 900 / T1L 300 ns · ±50 ns · period 1200 ns · reset 200 µs source: datasheet
SourceT0HT0LT1HT1LPeriodRateReset±
datasheet ↗ 300 ns 900 ns 900 ns 300 ns 1200 ns 833 kHz 200 µs 50 ns
T0H 0.3, T0L 0.9, T1H 0.9, T1L 0.3 us, each +/-0.05 us; symbol period at least 1.2 us; reset above 200 us. 24 bits, high bit first, G, R, B order (page 7).

Clones & compatibility

“Compatible” is never stated bare here — each relationship carries how strong the claim is, and what bites if you assume too much.

  • electrically similar Nationstar FC-RGBC4020 IC (unnamed)

    Same timing table, reset and GRB order in the two Nationstar sheets of the same date; the 3228 sheet's IC table differs (11.5 mA output against 12 mA, 4.5 kHz PWM against 4 kHz, 3.5-5.5 V supply against 4-5.5 V, 80 ns delay against 200 ns maximum). Kept separate because the electrical tables differ. source ↗

Library support

Not checked against library source.

Parts using this protocol

Dating evidence

Evidence, not a release date. A library commit proves the part existed by that date and says nothing about how long before.

  • 2023-06-16 datasheet revision Nationstar FC-RGBC3228-A1 specification, release date (发放日期) on the cover; version C0 ↗ day