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6.0 × 2.8 mm 4 pins top-emitting

T80

6028 · smd · TCWIN T80 · TCWIN

1-wire RGB 3.5–5.5 V active

At a glance

Colour
RGB8 bits per channel
Data
1-wiretimed pulses on one line
Supply
3.5–5.5 Vno backup data line
Size
6.0 × 2.8 × 1.8 mm4 pins · top
Max current
36 mA12 mA per channel
PWM
4 kHzreset 80 µs
Library support
FastLED WLED Adafruit

TCWIN T80: a 6.0 x 2.8 x 1.8 mm built-in-IC LED (6028), 12 mA per channel (9.6-14.4), cover rating 0.18 W, version A5 dated 2024-07-18. Pins 1 VDD, 2 DO, 3 GND, 4 DIN; the same drawing and pin order as TX1812DQ-F01 (tx1812-6028).

Datasheets disagree with the TX1812DQ sheet: T80’s timing table prints T0H 245/295/345 and T1L 245/295/345 ns but T0L and T1H as 545/900/1200 ns (so a zero code is 295 + 900 and a one is 900 + 295: a bit period of about 1.2 us), where TX1812DQ prints 545/595/645 ns for all four long phases.

Variants

One row per orderable SKU. Everything not listed is inherited from the part above.

Order codeFaceLensWhite PinsSiliconStatusFirst seenDatasheet
T80 — — — 4 — active 2024-07-18 A5
LCSC stock 2,640 on 2026-10-15.

Pinout

T80
T80 6028 package, top and side viewPin 1 is ringed. pin 1 VDD (power), pin 2 DO (data out), pin 3 GND (ground), pin 4 DIN (data in).11 VDDpower22 DOdata out33 GNDground44 DINdata in6.0 mm overall2.8 mmtop view1.8 mmside view
  • Power
  • Data
  • Ground
  • Pin 1

Outline and pin positions checked against the manufacturer datasheet (C48982533 T80 rev A5 p4). Straight leads out of a 3.1 x 2.8 mm body to 6.0 mm overall; lead height 0.7 mm and 0.8 mm gap read from the land-pattern view. Numbered 1 top-left, counter-clockwise. What this means.

  1. 1 VDD power
  2. 2 DO data out
  3. 3 GND ground
  4. 4 DIN data in

Protocol — TCWIN T80

Timings shown from datasheet.

TCWIN T80 bit timingTCWIN T80 bit timing: a zero bit is 295 nanoseconds high then 900 low; a one bit is 900 high then 295 low; reset 80 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1195 nsbit 1 period 1195 nsT0H 295 nsT1H 900 nsT0L 900 nsT1L 295 ns"0" bit"1" bit02004006008001000120014001600180020002200time, ns2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~1195 ns ≈ 28.7 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 80 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 295 / T0L 900 · T1H 900 / T1L 295 ns · period 1195 ns · reset 80 µs source: datasheet

Compatibility

  • protocol compatible TX1812

    T80 is the same 6028 footprint as TX1812DQ-F01 and its T0H / T1L windows equal the TX1812 ones; its T0L / T1H windows (545-1200 ns) contain the TX1812 typical 595 ns. Numbers only; nothing measured and no sheet relates the two. source ↗

Dating evidence

Nobody announces these parts, so this records what we can actually cite rather than a release date. Library support proves only that the part existed by that date.

  • 2024-07-18 datasheet revision TCWIN T80 specification cover: date 20240718, version A5 ↗ day

Where to buy

Stub data — a few rows so purchase links can grow later. Prices are not tracked.

Similar parts

Same protocol or package first, then the same data scheme and colour channels.

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