addressable.wiki
3.6 × 3.5 mm 6 pins top-emitting

P36-RGB05P05N3P1INA03-CC

3635 · smd · H-Great P36 two-wire IC (15 MHz) · H-Great

SPI RGB 3.5–5.5 V active

Also sold as P36-RGB05, HG P36

At a glance

Colour
RGB8 bits per channel
Data
SPIclock + data, timing-tolerant
Supply
3.5–5.5 Vno backup data line
Size
3.6 × 3.5 × 1.5 mm6 pins · top
Max current
60 mA20 mA per channel
PWM
—no reset period
Library support
FastLED WLED Adafruit

3.6 x 3.5 x 1.47 mm six-pad pixel; LCSC lists it as ‘SMD-6P,3.5x3.4mm’. Clock-and-data (APA102-style) with a 15 MHz clock. The cathode (GND, pad a) faces the tape sprocket holes (tape note). 1000 pcs per reel. The H-Great P34-RGB03 parts on LCSC (C52754102, C52754104; 3.4 x 3.3 x 1.9 mm) have no IC (forward current 50 mA, plain RGB) and are skipped. LCSC stock 1,000 on 2026-10-15.

Variants

One row per orderable SKU. Everything not listed is inherited from the part above.

Order codeFaceLensWhite PinsSiliconStatusFirst seenDatasheet
P36-RGB05P05N3P1INA03-CC — clear — 6 — active 2023-07-28 A2
LCSC C52754106, stock 1,000.

Pinout

P36-RGB05P05N3P1INA03-CC
P36-RGB05P05N3P1INA03-CC 3635 package, top and side viewPin 1 is ringed. pin 1 GND (ground), pin 2 CKI (clock in), pin 3 DIN (data in), pin 4 DOUT (data out), pin 5 CKO (clock out), pin 6 VDD (power).11 GNDground22 CKIclock in33 DINdata in44 DOUTdata out55 CKOclock out66 VDDpower3.6 mm3.5 mmtop view1.5 mmside view
  • Ground
  • Clock
  • Data
  • Power
  • Pin 1
  • Cut corner

Outline and pin positions checked against the manufacturer datasheet (C52754106 P36-RGB05P05N3P1INA03-CC A2 p10). The sheet labels the pads a to f, not 1 to 6: a GND top-right, b CKI, c DIN down the right edge, then d DOUT bottom-left, e CKO, f VDD up the left edge. Pins 1 to 6 here are those letters in order (clockwise from the top- right). 0.85 x 0.60 mm pads (0.53 mm middle pad) with 1.90 mm between columns; the 'C:0.4' chamfer is at the bottom-right next to pad c. What this means.

  1. 1 GND ground
  2. 2 CKI clock in
  3. 3 DIN data in
  4. 4 DOUT data out
  5. 5 CKO clock out
  6. 6 VDD power

Protocol — H-Great P36 two-wire IC (15 MHz)

This is an SPI part: the clock is explicit, so there is no fixed bit period. The frame layout is shown below.

H-Great P36 two-wire IC (15 MHz) SPI frameH-Great P36 two-wire IC (15 MHz) clocked frame: start frame, one 32-bit LED frame per pixel with brightness and colour bytes, and an end frame, plus data and clock waveforms1 · Frame stream (data clocked on CLK)Start frame32 × 0LED 132 bitsLED 232 bits…LED N32 bitsEnd frameclock ≥ N/2 edgeseach LED forwards what it does not keep on DO / CO2 · One LED frame: 32 bits, MSB first111brightch 1 8ch 2 8ch 3 83 marker bits (111), 5-bit global brightness 0–31, then 8-bit channels3 · DATA and CLK, first 8 bits of an LED frameDATACLK11110010111 markerbrightness bits 4..0data changes while CLK is low,LED samples on the rising edgeno fixed bit period: clock rateis set by the host
Frame layout: APA102-family 32-bit LED frames convention, see the protocol notes for end-frame differences

Compatibility

  • protocol compatible APA102

    Same 32 zero-bit start, '111' + 5-bit global brightness + B, G, R 8-bit command and the same separate clock / data wiring as APA102. The sleep command and the 15 MHz / 30 ns limits are extras with no APA102 counterpart on the sheet, and the sheet never names APA102. source ↗

Dating evidence

Nobody announces these parts, so this records what we can actually cite rather than a release date. Library support proves only that the part existed by that date.

  • 2023-07-28 datasheet revision H-Great P36-RGB05P05N3P1INA03-CC sheet, page 1 'Version A0 2023-07-28' (page footer later reads A2 2024-9-2) ↗ day
  • 2024-09-02 datasheet revision H-Great P36 sheet footer 'Version A2 2024-9-2' and approval date 20240902 ↗ day

Where to buy

Stub data — a few rows so purchase links can grow later. Prices are not tracked.

Similar parts

Same protocol or package first, then the same data scheme and colour channels.

Was this page useful?

0 people found this useful