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5.0 × 5.0 mm 6 pins top-emitting

APA102

5050 · smd · APA102 · APA Electronic

SPI RGB 5–5.5 V active

Also sold as DotStar, Adafruit DotStar, APA102 5050

At a glance

Colour
RGB8 bits per channel
Data
SPIclock + data, timing-tolerant
Supply
5–5.5 Vno backup data line
Size
5.0 × 5.0 × 1.4 mm6 pins · top
Max current ≠
60 mA20 mA per channel
PWM
20 kHzno reset period
Library support
FastLED WLED Adafruit

Datasheets disagree

The sources we hold state different values for the facts below. Rather than pick one quietly, both sides are listed with where each was read. Check the datasheet for the exact part number and revision you are buying. How this is shown.

This part, APA102

Current per channel

The Shiji APA102C sheet (the only APA102 sheet held) gives different output currents in two places.

What each source says about current per channel
SourceSaysPage
apa102c "Built-in 20 mA constant current output" 1
apa102c Sink current (RGB) 22.5 / 24.5 / 26.5 mA min / typ / max 3

What we show. 20 mA is shown because the sheet’s own headline says so; the electrical table puts typical sink current nearer 24.5 mA. Design to the table and measure.

The SPI-driven alternative to the WS2812 family, sold by Adafruit as “DotStar”. Six pins rather than four, because clock has to come in and go out alongside data. In exchange, timing stops mattering and the PWM frequency is high enough to be invisible on camera.

Datasheet cross-check (Shiji APA102C sheet, 2026-10-15): body 5.0 x 5.0 mm and 1.4 mm high, six pads (three along each of two opposite sides), 160 degree view angle, 20 mA constant-current output stated in the feature list but a measured sink-current table of 22.5 / 24.5 / 26.5 mA (min/typ/max) at 5 V. The catalogue previously carried 1.7 mm height and 120 degrees with no source.

Variants

One row per orderable SKU. Everything not listed is inherited from the part above.

Order codeFaceLensWhite PinsSiliconStatusFirst seenDatasheet
APA102 white clear — 6 — active unknown PDF
APA102-B black clear — 6 — active unknown PDF
Black housing; identical die and pinout.

Pinout

APA102APA102-B
APA102 5050 package, top and side viewPin 1 is ringed. pin 1 SDI (data in), pin 2 CKI (clock in), pin 3 GND (ground), pin 4 VDD (power), pin 5 CKO (clock out), pin 6 SDO (data out).11 SDIdata in22 CKIclock in33 GNDground44 VDDpower55 CKOclock out66 SDOdata out5.4 mm overall5.0 mmtop view1.4 mmside view
  • Data
  • Clock
  • Ground
  • Power
  • Pin 1

Outline and pin positions checked against the manufacturer datasheet (Shiji / iPixel APA102C sheet p1-2). The sheet describes no chamfer or pin-1 mark. What this means.

  1. 1 SDI data in
  2. 2 CKI clock in
  3. 3 GND ground
  4. 4 VDD power
  5. 5 CKO clock out
  6. 6 SDO data out

Protocol — APA102

This is an SPI part: the clock is explicit, so there is no fixed bit period. The frame layout is shown below.

APA102 SPI frameAPA102 clocked frame: start frame, one 32-bit LED frame per pixel with brightness and colour bytes, and an end frame, plus data and clock waveforms1 · Frame stream (data clocked on CLK)Start frame32 × 0LED 132 bitsLED 232 bits…LED N32 bitsEnd frameclock ≥ N/2 edgeseach LED forwards what it does not keep on DO / CO2 · One LED frame: 32 bits, MSB first111brightB 8G 8R 83 marker bits (111), 5-bit global brightness 0–31, then 8-bit channels3 · DATA and CLK, first 8 bits of an LED frameDATACLK11110010111 markerbrightness bits 4..0data changes while CLK is low,LED samples on the rising edgeno fixed bit period: clock rateis set by the host
Frame layout: APA102-family 32-bit LED frames convention, see the protocol notes for end-frame differences

Compatibility

  • near clone SK9822

    Frequently sold as interchangeable and usually works, but the SK9822 implements global brightness as a real current source rather than superimposed PWM, runs a lower PWM frequency, updates non-staggered, and differs in end-frame handling. Not reliably drop-in. source ↗

  • protocol compatible of this ABOC HBGR32L two-wire IC (18 mA)

    The frame is APA102-shaped (32 zero bits, 111 + 5-bit brightness + three 8-bit values, 32 one bits) and the sheet shows the same SDI/CKI waveform. The two sheets disagree about the colour order, and neither names APA102, so only the frame structure is compared.

  • protocol compatible of this ABOC IC-NL3C-BA two-wire IC

    Same CIN/DIN clock-and-data arrangement and the same 32 zero-bit start frame, 3-bit '111' marker + 5-bit brightness and B, G, R order as APA102 on the page-4 description, but the sheet never mentions APA102 and gives no end-frame behaviour; recorded as a structural match.

  • drop in of this APA102C

    A cost-reduced APA102 sold under a near-identical name. Driven identically; the difference is manufacturing, not protocol.

  • drop in of this APA107

    Driven identically to the APA102 by every library. Marketed as a higher-refresh successor.

  • near clone of this HD107S

    Driven with the APA102 protocol by every library, and generally treated as a faster APA102. The caveat is that the specifications are vendor claims rather than a verifiable manufacturer datasheet, and the HD107S, APA107 and APA102 are frequently conflated in listings.

  • protocol compatible of this HD108

    Same SPI framing concept, but each pixel carries 16 bits per channel, so an APA102 driver will not produce correct output without explicit HD108 support.

  • protocol compatible of this H-Great P36 two-wire IC (15 MHz)

    Same 32 zero-bit start, '111' + 5-bit global brightness + B, G, R 8-bit command and the same separate clock / data wiring as APA102. The sleep command and the 15 MHz / 30 ns limits are extras with no APA102 counterpart on the sheet, and the sheet never names APA102.

  • protocol compatible of this Inolux PC (clock-and-data IC)

    Frame structure matches APA102 as drawn on the PC55 sheet p5: 32 zero bits start frame, per LED 32 bits '111' + 5-bit global brightness + Blue + Green + Red, 32 one bits end frame, clock and data on separate pins. The sheet never names APA102, so this is a structural match only; clock limits (30 MHz, 30 ns widths) and the end-frame behaviour have not been compared with the APA102 sheets.

  • electrically similar of this P9813

    Both are clock-plus-data chains with a 32-bit zero start frame and 32 bits per pixel in blue-green-red order, but the P9813 flag is two bits and is followed by inverted check bits rather than a 3-bit flag and 5-bit global brightness, so frames are not interchangeable.

  • near clone of this SK9822

    Widely sold as an APA102 equivalent and usually works, but it is not a drop-in. Global brightness is a controlled current source rather than superimposed PWM, so it does not flicker when dimmed. PWM is 4.7 kHz against 20 kHz. The update is non-staggered, and end-frame handling differs - a driver that relies on the APA102's end-frame behaviour can misbehave.

  • protocol compatible of this WL-ICLED (dual-wire)

    The frame layout reads like the APA102's: 32-bit zero start frame, 3 flag bits, 5-bit global brightness, blue-green-red 8-bit values, N/2 end bits. The differences on paper are the flag decoding (0b101 puts the LED to sleep) and the 300 ohm series resistors on both lines in the reference circuit. Nothing here has been run against an APA102 driver.

Dating evidence

Nobody announces these parts, so this records what we can actually cite rather than a release date. Library support proves only that the part existed by that date.

  • 2013-05-30 first library support FastLED — first commit introducing APA102 ↗ day
  • 2014-08-27 first documented cpldcpu, 'APA102 aka Superled' - the first detailed public analysis of the part ↗ day
  • 2014-11-30 first documented cpldcpu, 'Understanding the APA102 Superled' - full protocol and PWM teardown ↗ day
  • 2019-05-01 first library support WLED — first commit introducing APA102 ↗ day

Where to buy

Stub data — a few rows so purchase links can grow later. Prices are not tracked.

  • Adafruit 2343 checked 2026-09-04

Similar parts

Same protocol or package first, then the same data scheme and colour channels.

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