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TCWIN T63 group

1-wire RGB · TCWIN · tx18xx

Channels
RGB
Bits / channel
8
Supply
3.5–5.5 V
PWM
4 kHz
Backup data
no
Packages
7

TCWIN T-code sheets (headed “RGB LED (built-in IC)”, “Type Txx”) give no IC name or “naming principle” beyond the code itself. This protocol is the group of T-codes whose printed tables are identical; the sheets do not say the parts share one die. The 2024 refresh of the 5 mA and 12 mA parts in 2017, 1209, 3528, 4018 and 5050 packages. Identical electrical tables: 3.5-5.5 V, Vds 8.5-9.5 V, input high 0.7 VDD, PWM 3-5 kHz, 0.6-1 mA static, propagation delay at most 200 ns, 4 kV ESD, -40 to 85 C.

Refresh & flicker

Data rate 800 kHz typical (1100 maximum), 4 kHz PWM, 24-bit GRB, 12 mA (T63, T66, T68, T71, T76) or 5 mA (T67, T73) per channel.

Timing

TCWIN T63 group bit timingTCWIN T63 group bit timing: a zero bit is 300 nanoseconds high then 600 low; a one bit is 600 high then 300 low; reset 80 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 900 nsbit 1 period 900 nsT0H 300 nsT1H 600 nsT0L 600 nsT1L 300 ns"0" bit"1" bit020040060080010001200140016001800time, ns2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitch 1 · 8 bitsch 2 · 8 bitsch 3 · 8 bitsChannel order not recorded for this protocol · frame = 24 × ~900 ns ≈ 21.6 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 80 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 300 / T0L 600 · T1H 600 / T1L 300 ns · period 900 ns · reset 80 µs source: datasheet
SourceT0HT0LT1HT1LPeriodRateReset±
datasheet ↗ 300 ns 600 ns 600 ns 300 ns 900 ns 1111 kHz 80 µs —
Min/typ/max: T0H 220/300/400 ns, T0L 550/600/950 ns, T1H 550/600/950 ns, T1L 220/300/400 ns, reset at least 80 us. Typicals recorded.

Clones & compatibility

“Compatible” is never stated bare here — each relationship carries how strong the claim is, and what bites if you assume too much.

  • protocol compatible TX1812

    The TX1812 sheets print T0H 245-345 and T0L 545-645 ns; the typical 295 / 595 ns pair lies inside the T63 windows (220-400 / 550-950 ns) and the T63 typicals (300 / 600 ns) lie inside the TX1812 windows, so one stream satisfies both printed sets. Supply, GRB framing and the other electrical tables are the same. Numbers only; no sheet relates the two, and nothing was measured. source ↗

Library support

Not checked against FastLED’s chipset list or the other libraries’ source.

Parts using this protocol

Dating evidence

Evidence, not a release date. A library commit proves the part existed by that date and says nothing about how long before.

  • 2024-07-18 datasheet revision TCWIN T63 / T66 / T67 / T68 / T71 / T73 / T76 specification covers: date 20240718, version A5 ↗ day