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5.4 × 5.0 mm 4 pins top-emitting

SK6812

5050 · smd · SK6812 · OPSCO Optoelectronics

1-wire RGB 3.7–5.5 V active

Also sold as NeoPixel, SK6812 5050

At a glance

Colour
RGB8 bits per channel
Data
1-wiretimed pulses on one line
Supply ≠
3.7–5.5 Vno backup data line
Size
5.4 × 5.0 × 1.6 mm4 pins · top
Max current ≠
36 mA12 mA per channel
PWM ≠
1.2 kHzreset 80 µs
Library support
FastLED WLED Adafruit

Datasheets disagree

The sources we hold state different values for the facts below. Rather than pick one quietly, both sides are listed with where each was read. Check the datasheet for the exact part number and revision you are buying. How this is shown.

This part, SK6812

Current per channel

The 2015 sheet states no rated current, only a 13 mA test condition; the 2025 sheet says 12 mA.

What each source says about current per channel
SourceSaysPage
sk6812 IOUT = 13 mA (test condition for rise/fall time) 4
sk6812-012-c5378720 5 V @ 12 mA per channel 3

What we show. 12 mA per channel and 36 mA per pixel are shown. Earlier versions of this catalogue showed 20 / 60 mA, which neither sheet states.

Pinout

The 2015 and 2025 sheets number the same four pads differently.

What each source says about pinout
SourceSaysPage
sk6812 1 VDD, 2 DOUT, 3 VSS, 4 DIN 3
sk6812-012-c5378720 1 GND, 2 DIN, 3 VDD, 4 DOUT (numbered from the bottom-right pad) 5

What we show. The 2015 numbering is recorded, with the physical pads drawn as the sheet shows them. Identify pins by name and position, not number.

Protocol SK6812

Reset period

The 2015 sheet asks for 80 µs, the 2025 sheet for more than 200 µs.

What each source says about reset period
SourceSaysPage
sk6812 Trst 80 µs 5
sk6812-012-c5378720 Reset > 200 µs 7

What we show. Both datasheet sets are listed, the older first. Whether the silicon changed or only the documentation is not known; 200 µs or more satisfies both.

Bit timing

The one-bit split differs between sheets and FastLED.

What each source says about bit timing
SourceSaysPage
sk6812 T1H 600 ns, T1L 600 ns, each ±150 ns 5
sk6812-012-c5378720 T1H 650 ns–1 µs, T1L ≥ 200 ns 7
FastLED led_timing.h (driver-tuned) T1H 900 ns, T1L 300 ns —

What we show. All are listed in the timing table. Only a scope on a known reel settles which is true of the silicon.

PWM frequency

OPSCO gives 1.2, 1.0, 4 and 4.5 kHz for parts sold as SK6812.

What each source says about pwm frequency
SourceSaysPage
sk6812 1.2 kHz (rev 02, 2015) 4
sk6812-012-c5378720 1.0 kHz (rev B/1, 2025) 6
sk6812rv-f-c5378723 4 kHz (SK6812RV-F) 6
sk6812mini-ka-c7423120 4.5 kHz (SK6812MINI-KA) 5

What we show. 1.2 kHz is shown, from the sheet this protocol’s first timing set is read from. The variant sheets are different silicon or revisions.

Supply voltage

The 2015 sheet gives a lower minimum supply than the 2025 sheet.

What each source says about supply voltage
SourceSaysPage
sk6812 VDD +3.5 to +5.5 V 4
sk6812-012-c5378720 VDD 3.7 to 5.5 V 6

What we show. 3.7 V (the newer sheet) is shown because it is the safer minimum.

OPSCO’s counterpart to the WS2812B, and the family that also has an RGBW version. Physically and electrically a drop-in for WS2812B in 5050; the supply range (3.7-5.5 V) is similar to the WS2812B’s, not wider, and the required reset is longer (see the protocol page). The package is 5.4 x 5.0 x 1.6 mm (a 5.0 mm body with pads sticking out to 5.4); the 2015 sheet titles it “5.5x5.0x1.6”.

Two datasheet generations, two numbering schemes, same pads: the 2015 sheet lists 1 VDD, 2 DOUT, 3 VSS, 4 DIN (what this part records); the current LCSC sheet lists 1 GND, 2 DIN, 3 VDD, 4 DOUT. In the top view VDD is top-left, DIN top-right, DOUT bottom-left and GND bottom-right, with the chamfer at the GND corner. The current sheet specifies 12 mA typical per channel (10-14.5 mA), 1.0 kHz PWM and a 200 us reset - not the 80 us / 1.2 kHz of the 2015 sheet; see the protocol.

Variants

One row per orderable SKU. Everything not listed is inherited from the part above.

Order codeFaceLensWhite PinsSiliconStatusFirst seenDatasheet
SK6812 white clear — 4 — active 2015-07-08 02B/1
Everything is inherited from the part. LCSC stocks it as plain “SK6812” (63,560 when checked), whose current datasheet uses the 1 GND, 2 DIN, 3 VDD, 4 DOUT numbering.
SK6812-B black clear — 4 — active 2015-07-08 02B/1PDF ↗
Black housing; identical die and pad positions. OPSCO’s naming table defines the “B” suffix as a black PPA surface (SK6812MINI-B-012 sheet). T0H spec is 0.20-0.40 us (0.25-0.40 on the plain part). Stock 6,055.
SK6812A — — — 4 — active 2015-07-08 02B/1PDF ↗
The sheet does not define the “A”. Datasheet document SK6812A-000 rev B/1 (2025-11-10). Stock 905.
SK5812D — diffused — 4 — active 2015-07-08 02B/1PDF ↗
Sheet says the colloid is foggy (diffused). Note the IC is numbered 5812, not 6812: it is a different IC code in the same 5050 package. Stock 1,020.

Pinout

SK6812SK6812-BSK6812ASK5812D
SK6812 5050 package, top and side viewPin 1 is ringed. pin 1 GND (ground), pin 2 DIN (data in), pin 3 VDD (power), pin 4 DOUT (data out).11 GNDground22 DINdata in33 VDDpower44 DOUTdata out5.4 mm overall5.0 mmtop view1.6 mmside view
  • Ground
  • Data
  • Power
  • Pin 1
  • Cut corner

Outline and pin positions checked against the manufacturer datasheet (C5378720 SK6812-012 rev B/1 p4-5; src/datasheets/opsco/sk6812.pdf p3). Pin numbers follow the 2015 OPSCO SK6812 sheet (1 VDD, 2 DOUT, 3 VSS, 4 DIN); the 2021+ sheets number the same pads from the bottom-right (1 GND, 2 DIN, 3 VDD, 4 DOUT). What this means.

  1. 1 GND ground
  2. 2 DIN data in
  3. 3 VDD power
  4. 4 DOUT data out

Protocol — SK6812

Timings shown from datasheet. Other sources disagree; see the protocol page.

SK6812 bit timingSK6812 bit timing: a zero bit is 300 nanoseconds high then 900 low; a one bit is 600 high then 600 low; tolerance plus or minus 150 nanoseconds; reset 80 microseconds low1 · Bit encoding, to scaleDINhighlowbit 0 period 1200 nsbit 1 period 1200 nsT0H 300 ±150 nsT1H 600 ±150 nsT0L 900 ±150 nsT1L 600 ±150 ns"0" bit"1" bit020040060080010001200140016001800200022002400time, ns± tolerance on each falling edge2 · One frame: 24 bits, most-significant bit firstDIN170110010007100110101700101100bitG · 8 bitsR · 8 bitsB · 8 bitsWire order GRB · frame = 24 × ~1200 ns ≈ 28.8 µs · example data, first bits 1 0 1 …3 · RESET / latchlast bits of frame 1first bits of frame 2LEDs latch the data they receivedRESET: DIN low ≥ 80 µs (not to scale)4 · Cascade: each DOUT feeds the next DINMCULED 1DINDOUTLED 2DINDOUTLED NDINDOUTLED 1 keeps the first 24 bits, re-shapes the signal and sends the rest out on DOUT;LED 2 keeps the next 24, and so on. The last LED's DOUT is left unconnected.
T0H 300 / T0L 900 · T1H 600 / T1L 600 ns · ±150 ns · period 1200 ns · reset 80 µs source: datasheet

Compatibility

  • drop in WS2812B

    Timings overlap enough that WS2812B code drives it without changes, and the 5050 footprint and pad positions match (in the top view VDD is top-left, DIN top-right, DOUT bottom-left, GND bottom-right on both; only the pin NUMBERS differ between datasheets). Differences that matter: the reset is longer, not shorter - 80 us in the 2015 sheet and above 200 us in the current one, against the WS2812B datasheet's 50 us (the WS2812B-V5 sheets say above 280 us). The supply range is not wider either: 3.7-5.5 V (3.5-5.5 V in the 2015 sheet) against 3.5-5.3 V for the old WS2812B sheet and 3.7-5.3 V for V5. The PWM frequency is 1.0-1.2 kHz, higher than the pre-V5 WS2812B's 400 Hz but lower than the V5's 2 kHz. source ↗

  • protocol compatible of this Everlight one-wire RGB+IC (5V01)

    Timing windows overlap the SK6812's zero bit, but the colour order is RGB rather than GRB and the reset is 50 us. Not tested.

  • electrically similar of this Guiguang GL01H (unnamed IC)

    Inferred from the printed numbers only; no Guiguang sheet names SK6812 or any IC. The 2015 OPSCO SK6812 table (T0H 300, T0L 900, T1H 600, T1L 600 ns +/-150) sits inside all four GL01H windows, as does the 5050 pin order. But the GL sheets send RGB (SK6812: GRB), reset after 180 us (SK6812: 80 us in 2015, above 200 us in 2025) and a 4.5-5.5 V supply. A GRB controller will swap red and green.

  • protocol compatible of this Inolux PI (single-trace IC)

    The four typical values of the older sheets (T0H 300, T0L 900, T1H 600, T1L 600 ns, reset 80 us, GRB, 24 bit, MSB first) are the same numbers the sk6812 protocol records from the OPSCO SK6812 rev. 02 sheet, so the framing and timing are interchangeable on those sheets. None of the Inolux sheets mentions SK6812 or WS2812 by name. The newer windowed sheets move the typical T1H to 640-900 ns, and the PI55TA and PI3210 sheets ask for a reset of 200 us, so this is protocol-compatible, not a clone claim.

  • protocol compatible of this Kingbright AAAF5050 RGB+IC

    Same 24-bit GRB frame and the SK6812's 300/900 ns zero bit; the sheet's one bit is 900/300 (FastLED's SK6812 figure, not the SK6812 datasheet's 600/600). Reset is 200 us against the SK6812 sheet's 80 us. Not tested.

  • protocol compatible of this SK6112

    Accepts SK6812-style 24-bit frames in its default mode and sits in the same 5050 and 3.5 x 3.7 mm packages with the same pad positions, but it is a different IC with extra commands (feedback, current gain, sleep, IDs) and a 250 us reset. Whether a plain SK6812 driver is fully compatible has not been tested.

  • near clone of this SK6805

    The 5 mA sibling of the SK6812: the same single-wire framing and 4-pin GRB order, but 5 mA per channel instead of 12 mA, so a given brightness value is much dimmer, and a typical T1H of 900 ns against the SK6812's 700 ns. The part-number digits encode the drive current (6805 = 5 mA, 6812 = 12 mA). Not interchangeable for brightness.

  • protocol compatible of this SK6812 RGBW

    Identical timing, but four channels rather than three. Driving it with an RGB library shifts colours down the strip, because every pixel consumes one extra byte.

  • near clone of this SK6812HV

    The same 4-pin 5050 outline and pin positions as the 5 V SK6812, but a 9-14 V supply: plugging one into a 5 V SK6812 layout, or the reverse, destroys it or leaves it dark. Data timing windows overlap the SK6812's.

  • electrically similar of this SK6822

    Same family and single-wire scheme, but a 1750 ns bit period against the SK6812's 1200 ns. Not interchangeable at the same timings.

  • electrically similar of this TONYU 6812 (TR2)

    Inferred from the part code and printed numbers only; the TONYU sheet never names OPSCO or SK6812. Windows (T0H 200-400, T0L at least 800, T1H 600-1000, T1L at least 200 ns, reset above 200 us, 12 mA typical, 1.0 kHz PWM, 24 bits GRB) line up closely with OPSCO's current SK6812 sheet, and the package is the same 3.2 x 2.8 mm gull-wing outline and pin order as the SK6812MINI-E. Not tested on hardware.

  • electrically similar of this TONYU 6812F

    Inferred from the printed numbers and the part code only; the TONYU sheet never names SK6812 or any other vendor. Its windows (T0H 200-400, T0L at least 800, T1H 580-1000, T1L at least 200 ns, 24 bits GRB, 1.2 us symbol) overlap OPSCO's current SK6812 sheet (T0H 250-400, T0L at least 800, T1H 650-1000, T1L at least 200 ns). Differences: reset above 80 us against above 200 us in OPSCO's 2025 sheet, and a 1.2 kHz PWM.

  • electrically similar of this TZ1815

    Inferred from the printed numbers only; no TUOZHAN sheet names SK6812. The OPSCO SK6812 2025 sheet's typical timing (T0H 320, T0L 800, T1H 700, T1L 200 ns) falls inside all four TZ1815 windows, and both send 24 bits GRB. TZ1815 resets after 80 us where the 2025 SK6812 sheet asks for more than 200 us.

  • electrically similar of this TZ2812

    Inferred from the printed numbers only; no TUOZHAN sheet names SK6812 or any other vendor. The OPSCO SK6812 2025 sheet's typical timing (T0H 320, T0L 800, T1H 700, T1L 200 ns) falls inside all four TZ2812 windows (T0H 200-350, T0L 550-1200, T1H 550-1200, T1L 200-350 ns) and both send 24 bits GRB. Differences: TZ2812 resets after 80 us where the 2025 SK6812 sheet asks for more than 200 us, supply to 7.5 V against 5.5 V, and a WS2812B-style 400/850 ns stream is NOT inside the T0H window.

  • protocol compatible of this WL-ICLED (24-bit single wire)

    On paper only: nominal 300/900/900/300 ns against the SK6812 datasheet's 300/900/600/600 and FastLED's 300/900/900/300, same GRB order, reset 200 us against the SK6812's 80 us (the current OPSCO sheet also says 200 us). No Wurth part has been driven from a SK6812 driver by this catalogue.

  • protocol compatible of this Xinglight SK6812B 12 V 5050 (9-14 V, 8.5 mA, BIN)

    Only the title says SK6812B. A 12 V (9-14 V) part with VDD1/VDD2 pins, 8.5 mA per channel, a BIN auxiliary input and "intelligent reverse connection protection"; the OPSCO SK6812 is a 5 V part. Nothing in the sheet states compatibility.

  • protocol compatible of this Xinglight SK6812B with BIN input (3.5-7.5 V, 12 mA)

    Only the title (XL-3527RGBC-SK6812B, "XL-3527 (6812)" in the description) says SK6812; the sheet adds an auxiliary input BIN that the sheet describes as receiving the DIN data of the previous chip (i.e. the DOUT of the chip two positions upstream) so that one dead pixel does not stop the chain. The OPSCO SK6812 has no such pin.

  • protocol compatible of this Xinglight SK6812B with FDIN input (5 mA, 0.25/0.47 us windows)

    Only the title (XL-2020RGBC-SK6812B) says SK6812. The sheet adds a second data input (FDIN, pins DI1/DI2) and 5 mA drive; its timing table is the same 0.25/0.47 us set as the Xinglight 1515/2020 "2812B" sheets, which has nothing in common with the OPSCO SK6812 sheet.

Dating evidence

Nobody announces these parts, so this records what we can actually cite rather than a release date. Library support proves only that the part existed by that date.

  • 2015-07-08 datasheet revision OPSCO SK6812 specification rev. 02, dated on its cover page ↗ day
  • 2015-10-02 first library support FastLED — first commit introducing SK6812 ↗ day
  • 2018-01-10 first library support WLED — first commit introducing SK6812 ↗ day

Where to buy

Stub data — a few rows so purchase links can grow later. Prices are not tracked.

Similar parts

Same protocol or package first, then the same data scheme and colour channels.

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